The present invention relates to data encoders/decoders, and more particularly to a "simple code" encoder/decoder to convert a ternary signal to a binary signal while retaining both the clock and data components of the ternary signal.
In telecommunications systems for transmitting digital data, such as that defined by Technical Advisory No. 34 by American Telephone and Telegraph Company Network Planning and Design Department of Basking Ridge, New Jersey, data is transmitted as a ternary signal in B3ZS format having an embedded clock signal and having three logic states --+1, 0, -1. This signal is essentially an analog signal which always has a strong clock component regardless of data pattern by replacing strings of data zeros with alternating polar pulses. This type of signal can be switched using wideband analog routers, but would be more desirable to use digital routers that are less sensitive to crosstalk and have lower crosspoints.
Other types of digital codes, such as Manchester code, convert a binary NRZ signal with no embedded clock component into a binary signal with an embedded clock component. However, Manchester code requires twice the bandwidth of the original NRZ signal, and for asynchronous data it requires a preamble to insure that clock recovery circuits can recover the correct clock phase relationship Thus prior techniques for encoding/decoding the DS3 signal require decoding the DS3 signal into NRZ and reencoding as another digital code having a strong clock component This results in a complex encoding/decoding circuitry.
What is desired is an encoding/decoding scheme which converts a ternary signal into an NRZ binary signal in a single transformation while retaining the clock and data components of the ternary signal.